Highlights of GSA Silicon Summit- April 18th @CHM, Mt View, CA
“Moore’s Law has transcended computing expectations; however, its promise will eventually reach scalability limitations due to extraordinary consumer demands. Future technology encompasses breakthroughs capable of interaction with the outside world, which the “More than Moore” movement achieves. Through integrating functionalities that do not scale to deliver cost-optimized and value-added system solutions, this trend holds significant potential for the industry. This event will explore the business and technical factors defining the More than Moore movement, and address how it will yield revolutionary electronic devices.”
■Kaivan Karimi, Executive Director, Global Strategy & Business Development, Microcontroller Group, Freescale
■Mark Miscione, VP, RF Technology Solutions, Peregrine
■Dr. Naveed Sherwani, Co-Founder, President & CEO, Open-Silicon
■Dr. Ely Tsern, VP & Chief Technologist, Memory and Interfaces Division, Rambus
Moderator: Edward Sperling, Editor in Chief, System-Level Design and Editorial Director, Low-Power Engineering
■Dr. John Heinlein, VP, Marketing, Physical IP Division, ARM
■Kamran Izadi, Director, Advanced Semiconductor Sourcing, Cisco
■Oleg Logvinov, Director of Market Development, Industrial and Power Conversion Division, STMicroelectronics
- Many of the functions that have to be integrated into devices are analog/RF where Moore’s Law does NOT apply!
- Mixed signal technologies (combining analog and digital circuits in a single chip/module) need to continue to advance to include those functions along with typical baseband and DSP on the same chip/module.
- Packaging technology will be critically important- both at the component/module and systems level. Innovation and “out of the box thinking” here are very much needed.
- Testing at the package and system level will also be important.
- For the IoTs, the following I/O improvements are needed for devices/networked sensors: short reach, very low power, variable bit rate (low to high), support of multiple wireless standards (e.g. Blue Tooth, Zigbee, Low Power WiFi, etc)
- A new way of designing analog ICs needs to be considered for the IoT to be a mass market.
- A key question here is “how much further can the industry convert (inherently) analog functions to digital and then use DSPs to implement them?”
- Many of the mobile computing functions will be implemented by servers in a cloud resident Data Center. For those servers, interconnects on the circuit board could be the limiting factor in reducing cost and power.
“It’s natural for MEMS and mixed-signal devices, or MEMS and logic devices, to live in a side-by-side (2.5D) world.”
“Organic substrates for 2.5D interposers show great promise for reducing 2.5D interposer costs – look particularly to the work being done by Georgia Tech.”
“If you don’t follow scientific change then what you practice reverts to witchcraft.” (The Rabinovitsi Paradigm.)
“Innovation in packaging may be more relevant than Moore’s Law moving forward.”
“3D packaging is becoming a very exciting technology, with as much relevance as a process node shift.”
“The IoT needs packaging innovations – not Moore’s Law technology progression.”
“FinFET or packaging – where’s the smart money playing? The problem is one of die / device performance versus system performance – and packaging drives system performance.”
“That being said, 3D packaging is not a panacea – basic economics still rule.”
“Seven years from now it will be IoT applications driving the industry – and Moore’s Law progress doesn’t apply to the analog world, hence the need to work on heterogeneous integration / 2.5D / 3D IC.”
“New generations of network-side IC products are only 15% innovation – the other 85% is composed of standard I/O and memory IP. Moving some of that 85% from the board to the interposer or to a 3D stack will be a huge performance improvement – 3D memory integration, for example, is positively disruptive.”
“But doesn’t CMOS integration always win? Monolithic integration, or heterogeneous integration using 2.5D / 3D IC; either way it comes together, no one size fits all.”
“The 28nm process node has a lot to like about it: speed, cost, High Volume Manufacturing (HVM) capability, and IP portability all look good compared to 14nm FinFET.”
“Challenges that need addressing in 2.5D / 3D IC are supply chain related. The current cost structure for 2.5D / 3D is leveraged by materials and processing equipment.”
“Do we currently even have a functioning 3D IC ecosystem?”
“Thermal challenges have kept 3D IC from coming to the mainstream. 2.5D is much better than 3D from a thermal perspective.”
