The global RAN market has been declining for several years, putting pressure on network equipment vendors to cut costs and rethink their commitment to purpose built/custom RAN silicon products or ASICs.  In 2022, the market for RAN equipment and software generated about $45 billion in revenues, according to research by Omdia, an Informa company. By 2024, annual revenue had tumbled to $35 billion – a 22.22% drop (and even worse in real dollars when you include inflation). As a result. it has become harder to justify the cost of expensive purpose-built silicon for the shriveling RAN market sector.

The Radio Access Network (RAN) is the segment of the mobile network interfacing the end-users and the mobile core network.  In it’s IMT 2020 and IMT 2030 recommendations, ITU-R refers to the interface between a wireless endpoint and RAN equipment (base station or small cell) as the Radio Interface Technology or RIT).  The core network specifications all come from 3GPP which has ETSI rubber stamp them.

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Ericsson and Samsung appear increasingly reliant on Intel for RAN silicon, while Nokia has been dependent on Marvell, but is planning to use NVIDIA GPUs in the near future (much more below).  Let’s look at RAN silicon offerings from Intel, Marvell and NVIDIA:

1. Key RAN silicon offerings from Intel include:
   • Intel Xeon with Intel vRAN Boost: The primary processors for network and edge applications include specific Intel Xeon 6 SoCs (System-on-Chips) that integrate Intel’s vRAN Boost accelerators directly on the die. This integration helps offload demanding Layer 1 (physical layer) processing, such as forward error correction, from the general-purpose CPU cores.
   • Integrated Accelerators: These built-in accelerators are designed to improve performance-per-watt and increase capacity for RAN workloads. Intel’s approach is to provide high performance using common, off-the-shelf hardware with specialized acceleration, contrasting with other approaches that might rely entirely on general-purpose CPUs.
   • FPGAs (Field Programmable Gate Arrays): Through its acquisition of Altera, Intel offers FPGAs which can also be used in some RAN applications, allowing for flexible, programmable hardware solutions. 
   • Intel has a significant market share in 5G base station silicon and its upcoming Granite Rapids processors (part of the Xeon 6 family) are being developed to maintain its strong position in this market, including for Massive MIMO applications. The company faces strong competition, but its next-generation processors aim to improve performance and efficiency for both core and edge computing in 5G networks.  massive MIMO into future chips, such as the upcoming Granite Rapids generation.

• OCTEON Fusion Processors: These are baseband processors optimized for cost, power, and programmability, widely used in both traditional and Open RAN (O-RAN) architectures. The latest iteration, the OCTEON 10 Fusion processor, provides comprehensive in-line 5G Layer 1 acceleration, enabling RAN virtualization in cloud data centers.
• OCTEON Data Processing Units (DPUs): The OCTEON TX2 and OCTEON 10 families are multi-core ARM-based processors that handle 5G transport processing, security, and edge inferencing for the RAN Intelligent Controller (RIC). They incorporate hardware accelerators for AI/ML functions, enabling optimized edge processing.
• AtlasOne Chipset: This is a 50Gbps PAM4 DSP (Digital Signal Processor) and TIA (Transimpedance Amplifier) chipset solution for 5G fronthaul, optimized for high performance and power efficiency in integrated, O-RAN, and vRAN architectures.
• Ethernet Switches and PHYs: Marvell’s Prestera switches and Alaska Ethernet physical layer (PHY) devices are used in carrier infrastructure to provide the necessary networking connectivity for 5G base stations and data centers.
• Marvell also works with partners to integrate its technology into accelerator cards, such as the Dell Open RAN Accelerator Card powered by the OCTEON Fusion platform, to provide carrier-grade vRAN solutions. Furthermore, Marvell offers custom ASIC design services for hyper-scalers and telecom customers who need highly optimized, specific silicon solutions for their unique 5G and AI infrastructure requirements. 

3.  NVIDIA’s new silicon platform for AI Radio Access Networks (AI-RAN) is the NVIDIA Aerial RAN Computer, which is built on the next-generation Blackwell architecture. The primary system for AI-RAN deployment is the NVIDIA Aerial RAN Computer-1, which utilizes the NVIDIA GB200 NVL2 platform.

Key NVIDIA RAN components and features include:

• NVIDIA Blackwell GPU: The core graphics processor that features 208 billion transistors and provides significant performance improvements for AI and data processing workloads compared to previous generations.
• NVIDIA Grace CPU: The GB200 NVL2 platform combines two Blackwell GPUs with two NVIDIA Grace CPUs, connected by a high-speed NVLink-C2C (Chip-to-Chip) interconnect to form a powerful, unified superchip.
• NVIDIA Aerial Software: The hardware runs a full software stack that includes NVIDIA Aerial CUDA-Accelerated RAN libraries and NVIDIA AI Enterprise software for 5G and future 6G networks.
• Specialized Networking: The platform uses NVIDIA BlueField-3 Data Processing Units (DPUs) for real-time data transmission and precision timing, and NVIDIA Spectrum-X Ethernet for high-speed networking, which are critical for RAN performance. 
• The goal of this platform is to enable wireless telcos to run both traditional RAN and AI workloads concurrently on a common, energy-efficient, software-defined infrastructure, thereby creating new revenue opportunities and preparing for 6G. 

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To many stakeholders, piggybacking on the general purpose processors used in PCs and data centers might be more sensible, but that would require Virtual RAN (vRAN), which replaces custom silicon with such general-purpose processors.  However, it is a very small share of the RAN compute or baseband subsector.  Omdia says it was just 10% in 2023, but the market research firm expects that share to more than double by 2028. It that forecast pans out, vRAN could conceivably replace some of the custom RAN silicon business with general purpose processors.

Lat year, Ericsson allocated approximately $5.7 billion of its R & D budget to design and development of  ASICs for Layer 1 (PHY), the most demanding part of the baseband. It relies on Intel for other RAN silicon functionality. If virtual RAN claims a bigger share of a low- or no-growth market, Ericsson’s returns on the same level of investment in ASICs would decline because they wouldn’t be needed for vRAN.  Also, Intel’s Granite Rapids could markedly narrow the performance and cost gap with purpose-built RAN chips.

“We are doing trials on many platforms,” said Per Narvinger, the head of Ericsson’s mobile networks business group, in reference to that taste testing of different chips. “But the more important thing is that we have actually created this disaggregation of and separation of hardware and software.”

The aim is to have a set of RAN software deployable on multiple hardware platforms.  However,  that is not achievable with ASICs, which create  a tight union between hardware and software (they are inextricably tied together). The general-purpose options identified by Narvinger were AMD, Intel and Nvidia. Currently, Intel remains Ericsson’s sole silicon commercial vendor. Despite Ericsson’s professed enthusiasm for )single vendor) open RAN, its business today is nearly all about purpose-built 5G.

In sharp contrast, Samsung’s retreat from custom RAN silicon has appeared rapid. It is without doubt the biggest mainstream vendor of virtual RAN products, and there is barely interest in the purpose-built 5G technology it has developed with Marvell. The RAN that Samsung has built for Verizon in the US is entirely virtual. It is about to do the same in parts of Europe for Vodafone. Canada’s Telus purchases both virtual and purpose-built 5G products from Samsung. But Bernard Bureau, the operator’s vice president of wireless strategy, says the virtual now outperforms the traditional and is also significantly less expensive. The processors, as in the case of Ericsson, come exclusively from Intel.

• Ericsson’s primary concern likely centers on the hardware architecture utilized for Forward Error Correction (FEC), a resource-intensive Layer 1 function. While Intel’s Granite Rapids and preceding platforms integrate the FEC accelerator directly within the main processor, AMD provides this functionality via an external accelerator card. Ericsson has historically favored integrated solutions, citing the use of separate cards as an added expense.
• Samsung is evaluating virtualized RAN software that potentially obviates the need for a dedicated hardware accelerator when deployed on AMD’s high-core-count processors. Samsung is confident that the increased core density of AMD’s offerings can manage the computational load of a software-only FEC implementation, and a commercial offering may be imminent. Samsung’s transition to AMD processors from Intel would require minimal changes to existing software written for Intel’s x86 instruction set architecture.

Nokia’s situation is more complicated due to NVIDIA’s recent $1 billion investment in the company.  An apparent condition is that Nokia will designing 5G and 6G network equipment that uses Nvidia’s GPUs. As we noted in yesterday’s IEEE Techblog post, many telcos regard those GPUs as an expensive and energy-hungry component, which makes using them a risky move by Nokia.  Presumably, Nokia cannot use the money it has received from NVIDIA to develop 5G Advanced and 6G software specifically for Marvell’s special purpose RAN silicon.  If Nokia develops RAN software that runs on NVIDIA GPUs it conceivably could be repurposed for another GPU platform rather than specialized RAN silicon or an ASIC.  And the only viable GPU alternative to NVIDIA at this time (outside of China) is AMD.

References:

https://www.lightreading.com/5g/slow-death-of-custom-ran-silicon-opens-doors-for-amd

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