Marvell shrinking share of the RAN custom silicon market & acquisition of XConn Technologies for AI data center connectivity
Samsung and Nokia currently use Marvell’s OCTEON Fusion baseband processors and OCTEON Data Processing Units (DPUs) in their 5G Radio Access Network (RAN) equipment.
- OCTEON Fusion Processors: Samsung uses these baseband processors in its 5G base stations, particularly for massive MIMO (Multiple-Input Multiple-Output) deployments that require significant compute power for complex beamforming algorithms.
- OCTEON and OCTEON Fusion Families: Samsung has leveraged multiple generations of these processors for baseband and transport processing solutions.
- Customized OCTEON Silicon: Nokia uses customized Marvell OCTEON silicon across key applications, including multi-RAT (Radio Access Technology) RAN and transport.
- OCTEON Fusion Processors: These are used for baseband processing in Nokia’s 5G products.
- OCTEON TX2 and OCTEON 10 Families: These infrastructure processors are used for demanding tasks like packet processing, security, and edge inferencing within Nokia’s 5G infrastructure.
- OCTEON 10 Fusion: Nokia is working with the latest generation of this 5nm baseband platform, which supports use cases from radio units (RU) to distributed units (DU) for both traditional and Open RAN architectures.
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Meanwhile, the total global RAN market has been declining for years as network operators slash investment in network equipment and cut jobs. According to Omdia (owned by Informa):
- Global RAN equipment sales fell from $45 billion in 2022 to $40 billion in 2023 and just $35 billion in 2024. Nokia’s mobile networks business group suffered an operating loss of €64 million (US$75 million) on sales of €5.3 billion ($6.2 billion) for the first nine months of 2025.
- For its 2023 fiscal year (ending in January 2023), Marvell’s carrier division made almost $1.1 billion in revenues, more than 18% of total company sales. Two years later, annual revenues had slumped to just $338.2 million, less than 6% of turnover.
- Marvell’s carrier sales have also recently improved in fiscal 2026, rising 88% year-over-year for the first nine months, to $436.3 billion. However, that’s still half as much as Marvell made during the first nine months of fiscal 2024, and interest in the RAN has seemingly evaporated.
- Samsung’s share of the shrinking RAN market has declined. Amid contraction of the entire addressable market, revenues generated by Samsung Networks fell from 5.39 trillion South Korean won ($3.74 billion) in 2022 to just KRW2.82 trillion ($1.95 billion) in 2024. For the first nine months of 2025, Samsung reported network sales of KRW2.1 trillion ($1.46 billion). But it has also lost market share, which dipped from 6.1% in 2023 to 4.8% in 2024, according to Omdia.
- Ericsson has two development tracks – one for purpose-built RAN products based partly on its own custom RAN silicon and the other for an Intel-based virtual RAN. In contrast to Samsung, the purpose-built RAN silicon portfolio today accounts for nearly all of the company’s sales.
- Ericsson’s senior managers increasingly talk about virtualization as a means of developing one set of software for multiple hardware platforms. The hope is that software originally designed for use with Intel’s processors could be redeployed on CPUs from AMD or licensees from ARM Ltd. with minimal coding changes. Such optionality combined with the narrowing of the performance gap between CPUs and purpose built RAN silicon would make it hard for Ericsson to justify investment in its own custom silicon.
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Today, Marvell announced it will acquire XConn Technologies for $540 million to boost AI/data center connectivity. In late 2025, the company announced the acquisition of Celestial AI for up to $5.5 billion to expand its optical interconnects for next-gen data centers, solidifying its position in infrastructure semiconductors.
Adding XConn’s PCIe and CXL switching technology (see illustrations below), fills gaps in Marvell’s silicon portfolio and enables the company to expand into higher-speed interconnects (like PCIe Gen 6).

XConn Technologies XC 50256 chip: 256 lanes with total 2,048GB/s switching capacity
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XC50256 CXL 2.0 Switch Chip
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As AI workloads scale, data center system design is evolving from single-rack deployments to larger, multi-rack configurations. These next-generation platforms increasingly require a high-bandwidth, ultra-low latency scale-up fabric such as UALink to efficiently connect large numbers of XPUs and enable more flexible resource sharing across the system.
UALink is a new open industry standard purpose-built for scale-up connectivity, enabling efficient, high-speed communication so multiple accelerators can operate together as a single, larger system. UALink builds on decades of PCIe ecosystem innovation and incorporates proven high-speed I/O techniques to meet the bandwidth, latency, and reach requirements of next-generation accelerated infrastructure.
Together, Marvell and XConn will bring together a significantly larger, integrated team to fully address the rapidly emerging opportunity in UALink switching as well as comprehensively support the growing list of customers and partners who want to work with Marvell in evolving their next generation AI platforms.
About Marvell:
To deliver the data infrastructure technology that connects the world, we’re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world’s leading technology companies for over 30 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud and carrier architectures transform—for the better.
About XConn Technologies:
XConn is the innovation leader in next-generation interconnect technology for high-performance computing and AI applications. The company is the industry’s first to deliver a hybrid switch supporting both CXL and PCIe on a single chip. Privately funded, XConn is setting the benchmark for data center interconnect with scalability, flexibility, and performance. For more information visit: https://www.xconn-tech.com
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References:
https://www.lightreading.com/5g/fragile-samsung-deal-with-marvell-shows-challenge-for-ran-chipmakers


From Light Reading Jan 27, 2026:
Nokia’s supporters might reject the assertion it has gone all-in with Nvidia. Marvell Technology is still its main silicon partner for Layer 1, the computationally demanding part of the baseband. Nor did its objective sound that different from Ericsson’s when it announced the Nvidia deal. “We built a hardware abstraction layer so that whether you are on Marvell, whether you are on any of the x86 servers or whether you are on GPUs, the abstraction takes away from that complexity, and the software is still the same,” Pallavi Mahajan, Nokia’s chief technology officer, told Light Reading at the time.
Justin Hotard, Nokia’s CEO, has also characterized his Nvidia deal as “the shift from proprietary to general-purpose hardware.” Marvell itself appears concerned about the return on investment of developing custom RAN silicon for specific vendors.
https://www.lightreading.com/5g/ericsson-resists-nokia-like-nvidia-pact-keeps-chip-options-open
NVIDIA and Marvell Technology have formed a partnership designed to link Marvell into the NVIDIA AI factory and the wider AI-RAN ecosystem using the NVIDIA NVLink Fusion platform. This collaboration gives customers who build on NVIDIA architectures greater choice and flexibility when developing next-generation hardware environments.
Backing this hardware integration is a massive financial endorsement, as NVIDIA has invested $2 billion into Marvell. Financial analysts monitoring the telecoms sector often look for concrete monetary commitments to validate hardware alliances. This massive injection of capital guarantees that Marvell has the resources to scale its production of custom silicon and networking components.
Beyond the direct capital injection, the two technology giants plan to collaborate extensively on silicon photonics technology. Advancements in optical interconnects directly address the growing need for high-speed, low-latency networking architectures necessary to support heavy AI workloads at the edge.
The foundation of this joint effort relies on the NVIDIA NVLink Fusion platform, a rack-scale architecture that lets developers create semi-custom AI setups using the existing NVLink ecosystem.
Within this arrangement, Marvell takes responsibility for supplying custom XPUs alongside scale-up networking gear that maintains strict compatibility with NVLink Fusion. NVIDIA, meanwhile, will deliver the underlying support technologies, specifically the Vera CPU, ConnectX NICs, BlueField DPUs, Spectrum-X switches, the NVLink interconnect itself, and the rack-scale AI compute.
This specific division of hardware components creates a heterogeneous AI infrastructure for engineers building custom XPUs, ensuring complete compatibility with NVIDIA systems. Operators can then seamlessly integrate their edge deployments with NVIDIA’s GPU, LPU, networking, and storage platforms, tapping into the broader global supply chain ecosystem that NVIDIA maintains. The inclusion of BlueField DPUs, for instance, allows operators to offload heavy security and networking tasks from the main processors, freeing up valuable compute cycles for revenue-generating AI applications.
Matt Murphy, Chairman and CEO of Marvell, said: “Our expanded partnership with NVIDIA reflects the growing importance of high-speed connectivity, optical interconnect, and accelerated infrastructure in scaling AI.
“By connecting Marvell’s leadership in high-performance analog, optical DSP, silicon photonics, and custom silicon to NVIDIA’s expanding AI ecosystem through NVLink Fusion, we are enabling customers to build scalable, efficient AI infrastructure.”
The ability to deploy specialized compute nodes within the Radio Access Network changes the economic model of cellular sites. By partnering to turn the telecommunication network into a distributed AI infrastructure using the NVIDIA Aerial AI-RAN framework for 5G and 6G, operators can host enterprise workloads directly at the cell tower.
This edge capability establishes new revenue streams entirely disconnected from consumer smartphone subscriptions. Enterprises require low-latency processing for automated manufacturing, autonomous logistics, and real-time video analytics. Network operators can lease this edge compute capacity to enterprises, thereby driving up Average Revenue Per User (ARPU) and reducing enterprise churn.
Deploying private 5G solutions provides another direct application for this newly-announced infrastructure. The integration of Marvell’s custom silicon and NVIDIA’s rack-scale compute equips operators with the precise hardware combination necessary to secure highly lucrative private networking contracts. The data never leaves the factory floor, satisfying heavy data sovereignty and compliance regulations.
Jensen Huang, Founder and CEO of NVIDIA, commented: “The inference inflection has arrived. Token generation demand is surging, and the world is racing to build AI factories. Together with Marvell, we are enabling customers to leverage NVIDIA’s AI infrastructure ecosystem and scale to build specialized AI compute.”
Telecom operators cannot drop rack-scale AI compute into existing mobile switching centers without encountering friction. Integrating NVLink Fusion hardware requires extensive coordination with legacy Operations Support Systems (OSS) and Business Support Systems (BSS). Legacy BSS/OSS platforms were primarily designed to meter voice minutes and megabytes, not continuous API calls or dynamic edge compute provisioning. Overhauling these billing engines to handle AI-RAN monetization represents a massive and multi-year undertaking.
Furthermore, spectrum management becomes increasingly complex under this model. Running multi-tenant AI workloads concurrently with high-priority 5G baseband processing demands precise resource isolation. Directors often estimate that ensuring exact resource isolation can consume ten percent of edge computing overhead.
Operators must navigate multi-cloud environments, ensuring that containerized network functions interoperate smoothly with enterprise AI applications sharing the same physical silicon. While Marvell’s XPUs and NVIDIA’s Vera CPUs provide the processing variety needed for these distinct tasks, the software orchestration layer remains a daunting hurdle for IT directors to clear.
When operators expose these new edge capabilities through network APIs, they invite third-party developers to write applications integrated directly with the radio network. However, creating a developer-friendly API portal demands heavy investment in software infrastructure.
Legacy systems frequently lack the agility to authenticate, meter, and bill thousands of concurrent API requests originating from enterprise software. Upgrading these backend systems requires navigating a complex web of vendor lock-in and customized software deployments. IT directors face the difficult task of modernizing the billing infrastructure without causing service interruptions for the existing subscriber base.
https://www.telecomstechnews.com/news/nvidia-and-marvell-alliance-ai-ran-infrastructure/